The True Random Number Generator (TRNG) Digital Noise Source

Overview

Key Features

• robust, low-footprint, standard-cell based entropy source
• entropy generation through thermal noise extraction
• compliant with the statistical tests of the AIS31 and FIPS SP 800-90 standards
• random stream synchronization via external sampling clock
• generic implementation compatible with most FPGAs
• FPGA proven on the Intel Arria 10 FPGA SoC line
• typical size on a Intel Arria 10 SX 660: 400 ALM
• digital post-processing available separately

Benefits

• robust architecture
• standard-cell based
• thermal noise extraction
• low footprint
• FPGA proven

Deliverables

• encrypted netlist
• design specification

Technical Specifications