Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process
Overview
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LMINUS (C30 RVT).
Technical Specifications
Foundry, Node
UMC 28nm HLP
UMC
Pre-Silicon:
28nm
HLP
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