Source and Sink Current 100mA LDO for 28nm cascade I/O, UMC 28nm HPC Logic and Mixed-Mode Process
Overview
Source and Sink Current 100mA LDO for 28nm cascade I/O, UMC 28nm HPC Logic and Mixed-Mode Process
Technical Specifications
Short description
Source and Sink Current 100mA LDO for 28nm cascade I/O, UMC 28nm HPC Logic and Mixed-Mode Process
Vendor
Vendor Name
Foundry, Node
UMC 28nm Logic/Mixed_Mode HPC
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process
- Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process
- Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
- Power On Reset, Detector 1.8V and 0.9V Domain - TSMC 28nm
- Power On Reset, Detector 3.3V and 0.9V Domain - TSMC 28nm
- Power On Reset, Detector 3.3V and 0.9V Domain - TSMC 28nm