Simulation VIP for AMBA ATB

Overview

Cadence provides a mature and comprehensive Verification IP (VIP) for the Advanced Trace Bus (ATB) specification which is part of the Arm® AMBA® family of protocols. Incorporating the latest protocol updates, the Cadence® Verification IP for ATB provides a complete bus functional model (BFM), integrated automatic protocol checks, and coverage model. Cadence provides an integrated solution for interconnect verification that verifies the correctness and completeness of data as it passes through the system and performance analysis that provides automated generation of testbenches. Designed for easy integration in testbenches at IP, system-on-chip (SoC), and system levels, the VIP for ATB helps you reduce time to test, accelerate verification closure, and ensure end-product quality. The VIP is compatible with the industry-standard Universal Verification Methodology (UVM) and runs on all leading simulators.

Supported specification: AMBA4 ATB v1.0 and v1.1.

Key Features

  • Data Widths
    • All legal data widths
  • Automatic Subordinate Responses
    • Support to use automatic Subordinate responses
  • Delay Control
    • Control the delay between the items on the channels
  • Manager Signal Control
    • Control the values of the signals issued by the manager
  • Subordinate Response Control
    • Control over the values of the signals issued by the subordinate
  • Multiple Agents
    • Supports any number of agents
  • Transaction Types
    • Monitoring and driving of all transactions (data, flush, and sync)

    Block Diagram

    Simulation VIP for AMBA ATB Block Diagram

    Technical Specifications

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Semiconductor IP