SHA-256 encryption and decryption coprocessor
Overview
The SHA-256 Coprocessor is a hardware implementation of the SHA-256 cryptographic hash function
Key Features
- compliant with the FIPS 180-4 standard
- full support of SHA-256 and SHA-224 hash functions
- hardware automatic padding
- straightforward integration through low-level API
Benefits
- SHA-256 & 224
- FIPS 180-4 compliant
- automatic padding
- quick integration
- silicon proven
Deliverables
- IP interface: VHDL source code
- IP core function: encrypted netlist
- VHDL testbench
- non-regression suite vectors
- C low-level API
- design specification
Technical Specifications
Maturity
Silicon proven
Availability
Available