Secure-IC's Securyzr™ High-performance AES-GCM accelerator - optional SCA protection

Overview

The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards and Technology (NIST) in 2001.
Galois Counter Mode (GCM) is a mode of operation for AES which turns it into an AEAD (Authenticated Encryption with Associated Data).
The MAC data is computed in parallel with the block cipher, thereby no slow-down in the overall computation. It is well-suited for systems requiring multi-Gbps authenticated encryption speed, outstanding performance, minimal computational latency and high intrinsic degree of pipelining and parallelism.
It simultaneously provides confidentiality, integrity and authenticity assurances on the data. Implemented in hardware, it can achieve high speeds with low cost and low latency. It was designed to meet the need for an authenticated encryption mode that can efficiently achieve speeds of 10 Gbps and higher in hardware.
The AES GCM N Cores IP is a hardware implementation of an AES mode of operation function. It performs both encryption and decryption with 256-bit keys in GCM mode of operation.

Key Features

  • AMBA interface
  • Supported key sizes: 128, 192 and 256 bits
  • Compliant with NIST SP 800-38d
  • Tunable performance (from 500Mbps to 50Gbps @100MHz)
  • Secure-IC patented SCA countermeasures

Benefits

  • Easy to integrate
  • Tunable solution
  • Fully digital
  • AMBA interface
  • Strong technical support

Applications

  • Automotive
  • IoT
  • eHealth
  • Defense
  • Payments
  • Servers
  • Smart Grid
  • Identity
  • Media & Entertainment
  • Memory & Storage
  • Consumer Electronics
  • Edge & Cloud
  • Trusted Computing
  • AI
  • Printer
  • Industry

Deliverables

  • Technical specifications document including User manual, Integration guideline, Test Plan
  • VHDL RTL code
  • VHDL testbench and scripts for simulation
  • RTL of the AMBA wrapper
  • SW driver
  • Support for integration

Technical Specifications

Maturity
Silicon Proven
×
Semiconductor IP