True Random Number Generator

Overview

The True Random Number Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographically secured applications. It is a digital source of entropy designed for compliance with the NIST-800-90B and AIS31. The IP Core successfully passed NIST-800-22, 90B and AIS31 test suites on the entropy source and it is compliant with the FIPS-140-2 validation.

Random number generation is critical for any secure device. Random numbers are used for key generation, key exchange, digital signature, encryption and more. Typical secure protocols like IPsec, MACsec, TLS/SSL or wireless use them during authentication/ key exchange and data streaming phases.

The true random number generator includes conditioning function and health tests as defined in the NIST 800-90B and AIS31. Convenient AMBA APB interface is used for both control and data transfer.

Software Support
Linux drivers are available to ease the integration in Linux OS. The Linux driver provides direct access to the true random number generator through “/dev/random”. Software driver for micro-controller application is also available to ease the control of the random generator.

Technology
The entropy source is completely digital without any specific technology-dependent implementation. It makes it easy to port it to any technology (all ASIC nodes, Intel and Xilinx FPGA families). The random generator has been used in many ASIC and FPGA designs. Products from our customers have also passed FIPS 140-2 validation.



The True Random Number Generator is available in our Deterministic Random Bit Generator (SCZ_IP_BA433) and Crypto Coprocessors (SCZ_IP_BA450/456/457).

Key Features

  • NIST 800-90B compliant
  • AIS-31 start-up and on-line tests (optional)
  • Passed NIST 800-22, 90B and AIS31 test suites
  • FIPS 140-2 compliant
  • Ready for FIPS 140-3
  • Portable to FPGA and ASIC technology
  • Linux drivers (access from /dev/random)
  • AMBA APB interface
  • Pure digital

Benefits

  • Off-the-shelf, predictable and silicon-proven solution
  • Easy-to-Integrate
  • Logic footprint optimized to used functionalities
  • Portable to ASIC or FPGA technology
  • User-friendly Software API
  • Scalable

Block Diagram

True Random Number Generator Block Diagram

Applications

  • Defense
  • IPSec (VPN)
  • TLS/SSL
  • Automotive
  • IIoT
  • Wearable devices
  • Embedded Security

Deliverables

  • Netlist or RTL
  • Scripts for synthesis
  • Self-checking TestBench based on FIPS vectors
  • Documentation
    • Datasheet
    • Integration guide

Technical Specifications

Maturity
Silicon proven
Availability
Now
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Semiconductor IP