Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process G/LV
Overview
Memory Compilers
Technical Specifications
Foundry, Node
TSMC 130nm
Maturity
Avaiable
TSMC
Pre-Silicon:
130nm
,
130nm
BCD
,
130nm
BCD+
,
130nm
G
,
130nm
LP
,
130nm
LV
,
130nm
LVOD
Related IPs
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- Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF
- Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF
- Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP
- Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GC