PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 28nm HLP process
Overview
Input 20M-200MHz, output 62.5M-1GHz, frequency synthesizable PLL, UMC 28nm Logic and Mixed-Mode HLP process.
Technical Specifications
Foundry, Node
UMC 28nm HLP
UMC
Pre-Silicon:
28nm
HLP
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