PLL (Frequency Synthesizer) IP, Input: 12MHz - 200MHz, Output: 250MHz - 500MHz, UMC 90nm SP process
Overview
Input 12M-200MHz, output 250M-500MHz, frequency synthesizable PLL, UMC 90nm SP Logic process.
Technical Specifications
Foundry, Node
UMC 90nm SP
UMC
Pre-Silicon:
90nm
SP
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