Peripheral Interface Adapter (PIA)

The following information applies to both the Chip and Core versions of this 65xx brand microprocessor family member.

WDC's high volume production proven 65xx brand microprocessor family of manually designed GDSII hard cores are highly optimized cores that are small and low power and therefore an excellent choice for low power System-on-Chip (SoC) ASIC microcontroller designs. These static cores support a wide range of applications from radiation resistant hi-rel applications such as medical implantable life-support devices to ultra high volume consumer devices.

The WDC W65C21S Peripheral Interface Adapter (PIA) is designed for use with WDC’s 65xx and other 8/16-bit microprocessor families. The W65C21S provides programmed microprocessor control for peripheral devices in microprocessor based systems. Peripheral devices are interfaced through bit programmable 8-bit bidirectional I/O Ports (Port A and Port B) controlled by Data Direction Registers (DDRA and DDRB). The Data Direction Registers provide selection of data flow direction (input or output) on each respective I/O Port pin. Data flow direction may be selected on a line-by-line basis with intermixed input and output lines within the same port. The “handshake” interrupts control features are selected with the control registers (CRA and CRB) and are implemented by CA1 and CA2 for Port A and CB1 and CB2 for Port B. Handshaking enhances control over data transfer functions between the microprocessor and peripheral devices, as well as bidirectional data transfer between W65C21S Peripheral Interface Adapters in multiprocessor systems.