The DB8255A Programmable Peripheral Interface core is a full function equivalent to the Intel 8255A / 82C55A and Intersil 82C55A devices.
The DB8255A implements a general-purpose I/O interface connecting peripheral equipment to a microprocessor system bus. The core generates 24 programmable I/O lines which are individually programmed in 2 groups of 12 and used in 3 major modes of operation.
Functional Description
Data Bus Buffer
The 3-state, bi-directional 8-bit buffer is used to interface the DB8255A core to the microprocessor system data bus. Data, control words and status information are transferred through the Data Bus Buffer.
Processor Read / Write Control Logic
The Processor Read / Write Control Logic processes all internal and external transfers of both Data and Control or Status words. It accepts inputs from the microprocessor Address and Control busses and in turn, issues commands to both of the Control Groups.
Group A and Group B Controls
The functional configuration of each port is programmed by systems software. In essence, the microprocessor “outputs” a control word to the DB8255A. The control word contains information such as “mode”, “bit set”, “bit reset”, etc., that initializes the functional configuration of the DB8255A.
Ports A, B, and C
The DB8255A contains three 8-bit ports (A, B, and C). All can be configured in a wide variety of functional characteristics by the system software but each has its own special features to further enhance the flexibility of the DB8255A.
Port A. One 8-bit data output latch/buffer and one 8-bit input latch buffer.
Port B. One 8-bit data input/output latch/buffer.
Port C. One 8-bit data output latch/buffer and one 8-bit data input buffer (no latch for input). This port can be divided into two 4-bit ports under the mode control. Each 4-bit port contains a 4-bit latch and it can be used for the control signal outputs and status signal inputs in conjunction with ports A and B.
