The MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY. The IP is configured as a MIPI master optimized for camera interface applications (CSI-2).
The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed data traffic while low power functions are mostly used for control.
MIPI D-PHY 4 Lane CSI-2 TX (Transmitter) in TowerJazz 110nm
Overview
Key Features
- Consists of 1 Clock lane and up to 4 Data lanes
- Supports MIPI Standard 1.2 for D-PHY
- Supports both high speed and low-power modes
- 80 Mbps to 1.2Gbps data rate in high speed mode
- 10 Mbps data rate in low-power mode
- High Speed Serializer included
- Low power dissipation
Benefits
- Comprehensive embedded DFT features for allowing cost-effective high-volume manufacturing tests
Block Diagram
Video
Mixel D-PHY CSI-2 TX IP Demo Featured in the Teledyne e2v Snappy 2M CMOS Image Sensor
We demonstrate our customer demo, the Teledyne e2v Snappy 2M CMOS Image Sensor, featuring Mixel D-PHY CSI-2 TX IP.
Applications
- Mobile
- Displays
- Cameras/Sensors
- IoT
- VR/AR/MR
- Consumer electronics
- Automotive
Deliverables
- Specifications
- GDSII
- LVS netlist
- LEF file
- IBIS Model
- Verilog Model
- Timing Model
- Integration Guidelines
- RTL
- Documentation
- One year support
Technical Specifications
Foundry, Node
TowerJazz 110nm
Maturity
Silicon Proven
Availability
Now