Dolphin Technology now provides a memory BIST solution which has been optimized for Dolphin memories. It supports all Dolphin memory compilers, including SRAM and RF.
- Fully automated MBIST RTL and Gate flow
- Fully supported BIST test, diagnosis and soft/hard repair
- Fully supported eFuse controller for automated hard repair
- Fully supported ICL/PDL of IEEE 1687
Memory Test & Repair (MBIST)
Overview
Key Features
- + Analyze RTL design or netlist to identify memories
- + Plan MBIST engines
- + Insert into RTL design or netlist / Top level hookup to JTAG
- + Verify stand-alone/ Verify partition level / Verify top level
- + Automated subchip integration flow
- + Fully supported P1500 interface and Tap controller
- + Generate test patterns and SVF file
- + Incremental repair capability / Programmable March-style algorithm
- + APB interface for BIST test and fuse operation
- + Diagnosis test, Characterization test and SVF debug flow
Applications
- Memory Test/Repair
Deliverables
- + Encrypted Verilog/SystemVerilog RTL, or post-synthesis netlist
- + Synthesis and STA scripts
- + User guide documents
- + SV/UVM Verification suite with BFM
Technical Specifications
Foundry, Node
TSMC 7;12;16;28;40;55;65;80;90nm
Maturity
Pre Silicon
Availability
Yes
Related IPs
- Parameterizable RAM Built In Self Test
- Parameterizable ROM Built In Self Test Controller
- Embedded Configuration and Test Processor
- Dual Port SRAM Compiler IP, Support Repair Features, UMC 65nm SP process
- Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm LL process
- Quad SPI Flash Memory Controller