M8051EW Processor

Overview

The M8051EW and M8051W are microcode-free designs that are software compatible with industry standard 8051 devices, supporting both standard 8051 features and additional features corresponding to Intel 8051, 8031, 80C51BH, 80C31BH, and 87C51 devices and equivalent 8052 devices.

The M8051EW and M8051W each support up to 1 MB of Program Memory and 1 MB of External Data Memory and can be configured to work with either synchronous or asynchronous memories, using either separate Program and External Data Memory interfaces or a single, multiplexed memory interface. Support for slow memories is available through wait states.

Key Features

  • 2 clocks per machine cycle
  • Software compatible with Intel 8051, 8031, 87C51, and 8052 equivalents
  • Up to 1 MB of External Data Memory
  • Up to 1 MB of Program Memory
  • Up to 256 bytes of Internal Data Memory
  • Support for synchronous or asynchronous memories
  • Wait state support for slow Program and External Data Memories
  • Special instruction (MOVC @(DPTR++), A) available for downloading program code to RAM
  • Intel-compatible I/O Ports (optional)
  • 2 or 3 16-bit timer/counters (optional)
  • Full-duplex serial port (optional)
  • 25-source, 2 or 4-level interrupt controller with choice of interrupt handling schemes
  • 1, 2, 4, or 8 data pointers
  • Support for up to 118 user-defined external special function registers (ESFRs), 11 of which may be bit-addressable
  • Low-power support through Power-Down and Idle modes
  • Fully synthesizable, scan ready design

Block Diagram

M8051EW Processor Block Diagram

Deliverables

  • VHDL source code
  • Integration Testbench and Test-suite
  • Comprehensive Documentation
  • Scripts for simulation and synthesis with support for common EDA tools

Technical Specifications

Maturity
Silicon Proven
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Semiconductor IP