Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process GP/LP
Overview
Memory Compilers
Technical Specifications
Foundry, Node
TSMC 65nm
Maturity
Avaiable
TSMC
Pre-Silicon:
65nm
G
,
65nm
GP
,
65nm
LP
Related IPs
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- Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P