Ethernet Switch 1G/10G

Overview

Comcores Ethernet Switch 1G/10G IP core is a highly configurable and size optimized implementation of a non-blocking crossbar switch that allows continuous transfers between up to four (4) 10 Gbps Ethernet XGMII ports and sixteen (16) 1 Gbps GMII interfaces. The switch supports MAC learning, VLAN 802.1Q, and multicast.

It implements store-and-forward switching approach in order to fulfill Ethernet standard policy regarding frame integrity checking. Each port provides GMII or XGMII native interface for Ethernet PHY devices. The number of ports is configurable at compile time.

Key Features

Feature Rich
- Automatic MAC addresses learning and aging
- Support programmable static forwarding entries
- Full duplex Ethernet interfaces
- Supports VLAN
Easy to use
- XGMII/ GMII interfaces for attaching to external Physical Layer devices (PHY)
- Easy integration with standard Xilinx AXI4 Lite control interface
- Can be used in managed or unmanaged implementations
Highly Configurable
- Up to 16 1G and 4 10G ports configurable at compile time
- Configurable queuing behavior (round-robin, fair queuing)
- Support Ethernet Multicast
Silicon Agnostic
- Designed in VHDL and targeting both ASICs and FPGAs

Block Diagram

Applications

Cloud RAN:
Use this switch to ensure smallest size switch for switching of header information in a CPRI cross connect scenario.

Deliverables

The IP Core can be delivered in Source code or Encrypted format. The following deliverables will be provided with the IP Core license:
- Solid documentation, including User Manual and Release Note
- Simulation Environment, including Simple Testbed, Test case, Test Script
- Access to support system and direct support from Comcores Engineers
- Synopsys Lint and CDC

Technical Specifications

Maturity

Mature

Availability

Avaliable

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