eMMC 4.51 Device Controller
Overview
Arasan's eMMC 4.51 Memory controller is compliant with the latest MMC 4.51 specification released by JEDEC. The controller provides a peak bandwidth of 104MB/s and supports all of the security features offered by this standard. It also permits the Host to partition and manage card data. By supporting multiple boot modes and enhanced boot code access, eMMC 4.51 lowers system BOM by eliminating an extra chip to store boot code.
Key Features
- Compliant with eMMC 4.51 specification
- Peak bandwidth of 104MBps
- Supports dedicated hardware reset
- Manages multiple card memory partitions and configuration settings
- Handles access to secure Replay Protected Memory Block partition
- Hardware support for all eMMC 4.51 security modes - password, power-on, temporary or permanent
- Secure Erase and Trim to guarantee data deletion
Benefits
- Fully compliant core with proven silicon
- Premier direct support from Arasan IP core designers
- Easy-to-use industry standard test environment
- Unencrypted source code allows easy implementation
- Reuse Methodology Manual guidelines (RMM) compliant verilog code ensured using Spyglass
Deliverables
- RTL Source Code
- Synthesis scripts
- Test Environment
- Technical Documentation
Technical Specifications
Maturity
Pre-silicon
Availability
Now