eMMC 4.5 Card Slave Controller

Key Features

• Compatible with eMMC/MMC specification 4.5.
• Supports Dual Data Rate (DDR) data transfer.
• Enhanced MMC features including Boot, Sleep Mode, Reliable Write, Multiple Partitions and Security.
• Supports e2.MMC command set and HS200 mode for 200MByte/sec data rate.
• Simple 32-bit bus master interface to DMA data into user memory space.
• Optional interrupt-based transfer mode to allow local CPU maximum control.
• Optional two clock domain implementation allows user bus interface and MMC clock operates at different clock domains.
• Selectable maximum block size from 512 to 16Kbytes.
• Process most commands automatically without needing support from user logic.
• Supports eMMC/MMC 4.5 command set and standard slave register set.
• Choice of user interface bus including AHB, AXI, APB, PLB, Wishbone, SH4 and Avalon bus.

Technical Specifications