Vendor: So-Logic Category: Edge AI Accelerator

Decision tree evaluation core using serial architecture

So_ip_edt_un core can be used to implement the decision tree with the previously defined structure directly in hardware.

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Overview

So_ip_edt_un core can be used to implement the decision tree with the previously defined structure directly in hardware. It uses a simple sequential architecture that allows the smallest possible DT hardware implementation.
So_ip_edt_un core is delivered with fully automated testbench and a compete set of tests allowing easy package validation at each stage of SoC design flow.
The so_ip_edt_un design is strictly synchronous with positive-edge clocking, no internal tri-states and a synchronous reset.
The so_ip_edt_un core can be evaluated using any evaluation platform available to the user before actual purchase. This is achieved by using a time-limited demonstration bit files for selected platform that allows the user to evaluate system performance under different usage scenarios.

Key features

  • Implements DTs with previously defined structure
  • Uses simple sequential architecture that allows the smallest possible DT hardware implementation
  • Supports classification problems that are defined by numerical attributes only
  • DTs with univariate or multivariate tests are supported
  • DTs with nonlinear tests are supported
  • Possibility to alter the implemented DT structure during the actual operation
  • No special IP blocks are needed to implement the core, only memory, adders and multipliers
  • User can specify the number format for all DT parameters in order to achieve the best performance/size ratio after implementation

What’s Included?

  • VHDL Source Code or netlis
  • Verification environment with regression suite
  • Technical documentation
  • Installation notes
  • User Manual
  • Datasheet
  • Instantiation templates
  • Reference Design
  • Technical Support
  • IP Core implementation support
  • Variable length maintenance
  • Delivery of IP Core updates, minor and major changes
  • Delivery of documentation updates
  • Telephone & email support

Specifications

Identity

Part Number
so_ip_edt_un
Vendor
So-Logic
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

So-Logic
HQ: Austria
SO-LOGIC electronic consulting is a engineering company providing services for the development of advanced digital system solutions. All our designers have a minimum of a lot of experience in programmable logic development and PCB design. We can take your new design ideas from the concept stage, through prototype design and checkout, to full scale manufacturing. Our emphasis has been on embedded applications that use Xilinx FPGAs and CPLDs. Some of the products designed or co-developed with clients include: Real-time speech recognition system; DSP replacement with FPGAs; Video graphic interface cards; Pattern recognition for image systems; High-speed communications links for different transmission media; Back planes; Optical measurement system; Digital Signal processing with System Generator and Matlab; Video and Audio Compression; HD-SDI, AES/EBU, Video walls with LEDs; PCI cards; USB, Firewire and Rocket IOs.
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Frequently asked questions about Edge AI Accelerator IP cores

What is Decision tree evaluation core using serial architecture?

Decision tree evaluation core using serial architecture is a Edge AI Accelerator IP core from So-Logic listed on Semi IP Hub.

How should engineers evaluate this Edge AI Accelerator?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Edge AI Accelerator IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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