Dolphin Technology provides a broad range of high performance Memory Controller IP solutions for JEDEC-standard DDR4/3/2 and LPDDR3/2 SDRAM. Our Memory Controllers are also optimized to provide a complete solution when combined with Dolphin's DDR PHY solutions.
DDRx & LPDDRx DRAM Memory Controller - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
Overview
Technical Specifications
Foundry, Node
TSMC 40nm
Maturity
Pre Silicon
Availability
Available
TSMC
Pre-Silicon:
40nm
G
,
40nm
LP
Related IPs
- DDRx & LPDDRx DRAM Combo Memory Controller
- DDRx & LPDDRx DRAM Memory Controller - TSMC 12nm 12FFC,FFC+
- DDRx & LPDDRx DRAM Memory Controller - TSMC 16nm 16FFC,FF
- 1.8V Secondary Oxide DDRx & LPDDRx Combo I/O Interface - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF
- I2C Controller IP – Slave, Parameterized FIFO, Hs-Mode (3.4 Mbps) AXI/AHB/APB/Avalon Buses or direct to/from Registers or Memory
- SPI XIP Flash Memory Controller IP – Programmable IO & Execute-In-Place (XIP) via second AMBA Interface