(*) Throughput depends on the selected device and vary with the number of iterations.
China Multimedia Mobile Broadcasting (CMMB) LDPC decoder
Overview
TC4300 is a LDPC decoder designed for China Multimedia Mobile Broadcasting (CMMB) specifications. The Core is a stand-alone module, with no external memory needs. It is available for mainstream FPGA or ASIC device targets. Two throughput levels are proposed (*):
low-complexity Core : 75 Mbps
high-throughput Core : 150 Mbps
(*) Throughput depends on the selected device and vary with the number of iterations.
(*) Throughput depends on the selected device and vary with the number of iterations.
Key Features
- Compliant with China Multimedia Mobile Broadcasting (CMMB) specifications
- Block size 9216 bits
- Code rate 1/2 and 3/4
- Near floating point error correction performance
- Early iteration stopping feature
- Patented architecture allowing high throughput for reduced footprint
- On-the-fly change of code rate and number of iterations
- Low latency
- Single FPGA Core (no external memory required), available on all popular Xilinx, Altera and Lattice devices
- ASIC Core : Verilog or VHDL RTL Core delivery
- Encoder available for decoder validation
Technical Specifications
Maturity
fied proven
Availability
Now