Analog-PLL For Frequency Multiplying

Overview

[Technology]
Process:TSMC 28nm HPM/HPC,
Available metalization technologies: 4X2Y2R and 5X2Y2R

Key Features

  • Including Loop-filter
  • VCO operating range : 850MHz - 1700 MHz
  • Output frequency range : 850MHz -1700 MHz
  • Input frequency range : 9.6MHz - 216MHz
  • Multiplying (Output freq. / PFD freq.) : 49 - 127
  • Divider : 7bit feedback divider and 3bit input divider
  • Power-down Mode
  • Multiple outputs with post-divider
  • Power-on sequence is constraint-free
  • STBY sequence is constraint-free

Block Diagram

Analog-PLL For Frequency Multiplying Block Diagram

Technical Specifications

Foundry, Node
TSMC 28nm HPM/HPC
TSMC
Pre-Silicon: 28nm HPC , 28nm HPM
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Semiconductor IP