[TECHNOLOGY]
Process : TSMC 28nm HPM/HPC
Available metallization technologies : 4X2Y2R and 5X2Y2R
Analog PLL For Frequency Multiplying
Overview
Key Features
- Including Loop-filter
- VCO operating range : 2500MHz - 5000 MHz
- Output frequency range : 1250MHz - 2500 MHz
- Input frequency range : 12MHz - 320 MHz
- Multiplying (Output freq. / PFD freq.) : 64 - 127
- Divider : 7bit feedback divider and 3bit input divider
- Power-down Mode
- Multiple outputs with post-divider
- Power-on sequence is constraint-free
- STBY sequence is constraint-free
Block Diagram

Technical Specifications
Foundry, Node
TSMC 28nm HPM/HPC
TSMC
Pre-Silicon:
28nm
HPC
,
28nm
HPM