Interrupt Controller (ICTRL) is an APB slave peripheral that can be used to control interrupts of devices when
that send interrupts to CPU.
An APB slave peripheral that can be used to control interrupts of devices when that send interrupts to CPU
Overview
Key Features
- 2 to 32 IRQ normal interrupt sources
- 1 to 8 FIQ fast interrupt sources (optional)
- Software interrupt
- Vectored interrupt (optional)
- Priority filtering
- Masking
- Programmable interrupt priorities (after configuration)
- Vector port interface that allows a processor to sample the vector address associated with the current highest priority irq without a bus access
Benefits
- dti_ictrl is compatible with the following standards: AMBA, Advanced Peripheral Bus (APB) Specification Version 2.0
Applications
- Communications, Data Processing, Industrial, Automotive
Deliverables
- Encrypted Verilog/SystemVerilog RTL, or post-synthesis netlist
- Synthesis and STA scripts
- User guide documents
- SV/UVM Verification suite with BFM
Technical Specifications
Short description
An APB slave peripheral that can be used to control interrupts of devices when that send interrupts to CPU
Vendor
Vendor Name
Maturity
Pre Silicon
Availability
Yes
Related IPs
- I2C Controller IP – Slave, SCL Clock, Parameterized FIFO, APB Bus. For low power requirements in I2C Slave Controller interface to CPU
- This is collection of Synchronization Components can be used to synchronize across different clock domains for control and Data Transfer
- JTAG Slave To APB Bridge IIP
- AHB to APB Bus Bridge
- AHB to APB Bus Bridge
- APB peripheral implementing the functionality of the ETSI TS 102613 V7.9.0 (2011-03) MAC Layer