A full range of power pads is provided to enable the system designer different options for separate core power (VDD and VSS) and separate I/O padring power and ground (DVDD and DVSS). The ability to isolate separate power domains is also provided. In addition, the I/O library has a full complement of cells that provide the user with the ability to isolate analog I/O’s and power within the same padring as the digital I/O’s.
Includes:
? Programmable GPIO
? Programmable fault-tolerant GPIO
? Input buffer
? Power supplies
? Isolated analog power supplies
? Oscillators
? Full complement of support pads
2.5V General Purpose Staggered IO Pad Set
Overview
Deliverables
- Physical abstract in LEF format (.lef)
- Timing models in Synopsys Liberty formats (.lib and .db)
- Calibre compatible LVS netlist in CDL format (.cdl)
- GDSII stream (.gds)
- Behavioral Verilog (.v)
- Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- Databook (.pdf)
- Library User Guide - ESD Guidelines (.pdf)
Technical Specifications
Foundry, Node
GLOBALFOUNDRIES, 40nm
Maturity
Silicon Proven
Availability
Available Now
GLOBALFOUNDRIES
Silicon Proven:
40nm
LP