Energy Design Needs Unified Hardware Abstraction
Vojin Zivojnovic, Jim Hogan (AGGIOS Inc.)
EETimes (11/13/2013 11:00 AM EST)
Energy-efficient product design, for both portable and plug-load devices, leads the list of on-going engineering priorities.
While mobile device makers have been forced by consumers' insatiable mobility requirements and fierce competition to significantly improve battery life, fixed-power products have been slower to deliver better energy consumption characteristics.
But a combination of government mandates, rising energy costs, facility limitations, and a general movement to all things green makes energy efficiency a top-level concern for every type of electronics maker.
The basic principle of energy design and management for electronic devices is to optimize the electrical activity within the electronic circuitry without impacting user experience or intended purpose. During the (pre-silicon) energy design phase, also called power design in Electronic Design Automation (EDA), we focus on tuning the hardware structures, assuming certain nominal signal activities, voltages, and clocks.
In the subsequent (post-silicon) energy management phase we tune the voltages, clocks, and functional activities during the test-and-run time, assuming certain hardware characteristics of the device.
Energy-efficient, complete solutions can be obtained only with optimal alignment across the pre- and post-silicon phases of energy optimization, supported by unified design flows, abstractions, and formats.
This requires a fundamental shift in the design infrastructures currently in use in today's product development flow. We believe a Unified Hardware Abstraction (UHA) is needed to promote a holistic, quantitative, and reusable approach to energy design and management.
To read the full article, click here
Related Semiconductor IP
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
- ASIL B Compliant MIPI CSI-2 CSE2 Security Module
Related Articles
- Why Hardware Root of Trust Needs Anti-Tampering Design
- Generic Driver Model using hardware abstraction and standard APIs
- Unified Verification for Hardware and Embedded Software Developers
- Abstraction and Control-Dominated Hardware Designs
Latest Articles
- RISC-V Functional Safety for Autonomous Automotive Systems: An Analytical Framework and Research Roadmap for ML-Assisted Certification
- Emulation-based System-on-Chip Security Verification: Challenges and Opportunities
- A 129FPS Full HD Real-Time Accelerator for 3D Gaussian Splatting
- SkipOPU: An FPGA-based Overlay Processor for Large Language Models with Dynamically Allocated Computation
- TensorPool: A 3D-Stacked 8.4TFLOPS/4.3W Many-Core Domain-Specific Processor for AI-Native Radio Access Networks