Toshiba Information Systems (Japan) Corp. and Magillem Design Services agree on technical support partnership of IP-XACT certified tool.
June 29, 2015 -- Toshiba Information Systems(Japan) Corp. (HQ: Kawawaki Japan) has agreed to provide technical support (in Japan) for Magillem(HQ Paris France) on its IEEE1685(IP-XACT) certified tool.
Magillem has been established in France on Nov. 2006 and has been providing production level IP reuse based design methodology and solutions to first tier customers around the world. Magillemfs main offices are in Paris and in Santa Clara . Magillem provides a solution for IEEE1685(IP-XACT cerified IP based development flow of SoC. that have been increasing in design size as well as expanding IP usage.
Here is a list of solutions that Magillem is offering:
- Solution for RTL: Auto-generation of verification environment including verification IP and UVM, auto-generation of netlist for synthesis tool.
- TLM based platform generation: Assembly of TLM IP which can be hierarchical, netlist generation of SystemC TLM which is supported by major EDA vendors (Cadence, Synopsys and Mentor).
- Solution for Analog: Auto-execution of analog simulator with conditions described in a document and its results are reflected back to its document automatically.
- Sync with a document and a design: Realization of full synchronization of design data (port, register, parameter information and others) with its document(specification)
Toshiba Info System will provide total support in high-level design (ESL) area with especially System C in Japan market, which covers from tool evaluation stage to post technical support. High-Level design methodology is one of Toshiba Info Systemfs expert areas, and our users have requested the methodology in SoC development whose design size continues to increase. We will continue providing LSI solution which can lead its industry.
About Toshiba Information Systems
We are part of Toshiba and has been providing most suitable solution to our customerfs needs in heathcare, embedded system, LSI and System Integration areas. For details, please visit : http://www.tjsys.co.jp
Related Semiconductor IP
- 1.8V/3.3V I/O Library with 5V ODIO & Analog in TSMC 16nm
- ESD Solutions for Multi-Gigabit SerDes in TSMC 28nm
- High-Speed 3.3V I/O library with 8kV ESD Protection in TSPCo 65nm
- Verification IP for DisplayPort/eDP
- Wirebond Digital and Analog Library in TSMC 65nm
Related News
- Magillem Design Services introduces MAGILLEM 4.0, the most comprehensive Integrated Design Environment based on the IP-XACT standards by The SPIRIT Consortium
- Magillem and Sonics Announce Joint Donation of IP-XACT Support of OCP Protocols to the OCP-International Partnership
- Magillem promotes IP Reuse, interoperability through IEEE 1685 and launches its IP-XACT Checkers Suite Software and Compliance Lab
- Magillem announces that Magillem Platform Assembly solution is now supporting OCP Vendor Extension for IEEE 1685 IP-XACT
Latest News
- Movellus and RTX’s SEAKR Engineering Collaborate on Advancing Mission-Critical ASICs
- DARPA Selects Cerebras to Deliver Next Generation, Real-Time Compute Platform for Advanced Military and Commercial Applications
- Rapidity Space to Demonstrate Performance Capabilities of the GR765 Platform with SIMD Support
- Telestream Integrates intoPIX’s JPEG XS Technology into PRISM for Advanced IP Video Monitoring
- UMC Unveils New Fab Expansion in Singapore in Grand Opening Ceremony