Monolithic System Technology, Inc. Updates Quarterly Guidance
--Monolithic System Technology, Inc. (MoSys), the industry's leading provider of high-density system-on-chip (SoC) embedded memory intellectual property (IP), has previously announced that Chet Silvestri, CEO, will be presenting at the Eighth Annual Needham Growth Conference at the New York Palace Hotel on Wednesday, January 11, 2006 at 3:30pm EST. In order to better discuss the business status of the company while at the Conference, the company is today announcing that a significant amount of the revenue associated with the sales of the company's new 1T-SRAM CLASSIC Macros will be deferred from the fourth quarter of fiscal 2005 to the first quarter of fiscal year 2006.
Chet Silvestri, CEO of MoSys, stated, "We had a very strong fourth quarter in terms of overall bookings and closed significant new orders in the consumer multimedia and cellular handset segments. Also, importantly, the majority of the bookings were for our new CLASSIC Macro products. However, because this is a new product category for us and we lack shipment experience with the CLASSIC Macros, we will defer approximately $1.0 million of revenue from the fourth quarter of 2005 into the first quarter of 2006. The revised guidance for the fourth quarter is for revenue to be in the range of $2.3 million to $2.5 million."
ABOUT MOSYS, INC.
Founded in 1991, MoSys (NASDAQ: MOSY - News), develops, licenses and markets innovative memory technologies for semiconductors. MoSys' patented 1T-SRAM technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. The single transistor bit cell used in 1T-SRAM memory results in the technology achieving much higher density than traditional six transistor SRAMs while using the same standard logic manufacturing processes. 1T-SRAM technologies also offer the familiar, refresh-free interface and high performance for random address access cycles associated with traditional SRAMs. In addition, these technologies can reduce operating power consumption by a factor of four compared with traditional SRAM technology, contributing to making them ideal for embedding large memories in System on Chip (SoC) designs. MoSys' licensees have shipped more than 98 million chips incorporating 1T-SRAM embedded memory technologies, demonstrating excellent manufacturability in a wide range of silicon processes and applications. MoSys is headquartered at 755 N. Mathilda Avenue, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Altera Updates Second Quarter Guidance
- MoSys Updates Second Quarter 2006 Guidance
- Xilinx Updates March Quarter Guidance
- Altera Updates Second Quarter Guidance
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack