Interview: Rambus' chairman looks to the future -- Geoff Tate discusses shortage of U.S. engineers, market opportunities and demand from chipmakers
March 24, 2005
Digital consumer electronics, and the trend for chip makers to license IP (intellectual property) rather than design everything in-house, is helping boost the market for Rambus, according to Geoff Tate, chairman of the Los Altos, California, technology licensing company specialized in I/O (input/output) interfaces.
The IDG News Service interviewed Tate last week when he was in Bangalore, where the company has set up a design center that will have 50 staff by the end of the year. The interview took place before this week's announcement of a truce in the company's battle with Infineon Technologies over the intellectual property rights to memory technology. Starting in November Infineon will pay Rambus $5.85 million each quarter for a license to existing and future Rambus patents. The payments will continue until November 2007 with special provisions if Rambus is able to sign licensing deals with SDRAM (synchronous dynamic RAM) vendors.
In the edited interview below, Tate talks about the company's strategy for making up for the shortage of quality engineers in the U.S., new opportunities in consumer electronics for the company, and the increasing demand from chip makers for licensable IP.
Click here to read more ....
Related Semiconductor IP
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
- ASIL B Compliant MIPI CSI-2 CSE2 Security Module
Related News
- CEO interview: Flex Logix' Geoff Tate on licensing FPGA
- NVIDIA Expected to Launch RTX PRO 6000 Special Edition for China’s AI Market, Potentially Boosting Future GDDR7 Demand, Says TrendForce
- Interview: John Bourgoin, chairman and CEO of MIPS Technologies
- Interview - Rajeev Madhavan, chairman and CEO of Magma Design: Intellectual Propriety (by Ed Sperling, Electronic News)
Latest News
- Arasan Announces immediate availability of its UFS 5.0 Host controller IP
- Bolt Graphics Completes Tape-Out of Test Chip for Its High-Performance Zeus GPU, A Major Milestone in Reducing Computing Costs By 17x
- NEO Semiconductor Demonstrates 3D X-DRAM Proof-of-Concept, Secures Strategic Investment to Advance AI Memory
- M31 Collaborates with TSMC to Achieve Tapeout of eUSB2V2 on N2P Process, Advancing Design IP Ecosystem
- Menta’s eFPGA Technology Adopted by AIST for Cryptography and Hardware Security Programs