French startup, Cortus SA, offers compact 32-bit RISC
Peter Clarke, EE Times
(02/27/2006 11:22 AM EST)
LONDON — A French startup company, Cortus SA, has developed a highly compact 32-bit RISC processor for embedded applications which it has begun offering for license.
The company, with R&D in Montpellier, France and an office in Redwood City, California, also offers IP around its processor core for applications in consumer, automotive and chip card applications including image processing acceleration and cryptography.
(02/27/2006 11:22 AM EST)
LONDON — A French startup company, Cortus SA, has developed a highly compact 32-bit RISC processor for embedded applications which it has begun offering for license.
The company, with R&D in Montpellier, France and an office in Redwood City, California, also offers IP around its processor core for applications in consumer, automotive and chip card applications including image processing acceleration and cryptography.
To read the full article, click here
Related Semiconductor IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
- RISC-V Debug & Trace IP
Related News
- Cortus Announces FPS6 32 bit Floating Point Microcontroller IP Core for High Performance Control and Signal Processing Applications
- Cortus Launches APS3R 32 bit Microcontroller IP Core for Low Energy Embedded Applications
- APS5 32 bit Microcontroller IP Core for High Performance Embedded ASIC Designs Launched by Cortus
- MIPS Technologies and TSMC form strategic alliance to deliver "hard" versions of MIPS 32 and 64 Bit Processor Cores
Latest News
- FuriosaAI ships RNGD, data-center-ready AI inference GPU alternative
- AMD, Adeas, Nextera Video, and intoPIX Announce Cost-Optimized IPMX Solution for AV-over-IP at ISE 2026
- Access Advance Extends HEVC Advance Rate Increase Deadline
- Lightmatter and Cadence Collaborate to Accelerate Optical Interconnect for AI Infrastructure
- Lightmatter Collaborates with Synopsys to Integrate Advanced Interface IP with Its Passage Co-Packaged Optics Platform