Barcelona Design Announces Next-Generation, High-Performance Clocking Engines

New engines deliver synthesized optimal, full-custom clocking circuits for 0.13um CMOS

Newark, Calif., June 3, 2002—Barcelona Design Inc., the leading provider of synthesizable full-custom analog IP, today announced the release of its 0.13um Miro™ Clocking Engines. This next-generation family of clocking engines will support clock generation, clock synchronization, and clock & data recovery circuit functions and generate globally optimal application specific instances for 0.13um CMOS processes.

Barcelona's Miro™ Class Clocking Engines are powerful analog intellectual property products used to generate application-specific clocking circuits. These Engines are targeted for chip designers working on consumer, wired and wireless communications, and high-end computing applications. They can synthesize and optimize multi-variant PLL design specifications from Spec to GDSII in matter of hours, redeploying designers' time to innovate at higher levels in the system.

"The new 0.13um Miro™ engine is a verification of the scalability of our revolutionary technology and our synthesizable analog IP solution," said Peter Santos, VP of Marketing and Business Development at Barcelona Design. "This represents the first step in the rapid expansion of supported circuits and processes that our customers are seeking."

The traditional hard IP or trial-and-error custom development approaches to phase-locked-loop (PLL)circuitry force engineers to trade-off time-to-market and optimality of the analog function.

Miro™ 0.13um Clocking Engines Summary:

• Clock generation, clock synchronization and clock & data recovery circuits in 0.13um CMOS processes
• PLL specifications of up to 1.8 GHz frequency and jitter as low as 5ps
• Full compatibility with Barcelona's Prado™ Synthesis Platform
• Initial engine, available July 2002, is a clock generation and synchronization dual voltage 2.5V/1.2V engine for TSMC 0.13um mainstream CMOS process

Barcelona Design licenses its engines on an annual subscription basis. Additionally, there is a per use license fee for each design instance produced by the engine and platform.
 
 

Barcelona Design Breaks the Bottleneck

Barcelona Design is the leading supplier of synthesizable full-custom analog IP, offering unique semiconductor intellectual property complemented by powerful design technology. Barcelona was founded in 1999 by CTO Dr. Mar Hershenson and Stanford University professor Dr. Stephen Boyd as a result of their research on the application of convex optimization mathematics to analog circuit design. The firm's analog circuit solution enables electronics companies to implement complex intellectual property (IP) instances radically faster than ever before. The company has proven its technology with working silicon, and has demonstrated market acceptance of its innovative approach by winning key customers, including Mitsubishi and ST Microelectronics. Barcelona has secured financing from leading venture capitalists including, Crosslink Capital, Sequoia Capital and Foundation Capital. The firm is headquartered in Newark, CA. For more information please visit www.barcelonadesign.com.