ARM Code to Run on MIPS-based Processors
![]() |
ARM Code to Run on MIPS-based Processors
By David Larner, Embedded Systems
October 15, 2001 (9:29 a.m. EST)
URL: http://www.eetimes.com/story/OEG20011015S0010
Transitive Technologies, a developer of CPU morphing software, and Alchemy Semiconductor, an Austin-based fabless semiconductor company has announced they are working together to enable application software written for ARM-based platforms to run on the Alchemy's family of high performance, low power MIPS microprocessors and evaluation platforms. Transitive's Dynamite A/M is providing Alchemy with a "Synthetic ARM" CPU software engine that enables their family of products to translate ARM binary code to MIPS binary code. It will scale Alchemy's current family of products, which include the 400 MHz, 1/2 watt Au1000 and the PCI enabled Au1500. This technology utilises a CPU configurable software platform that allows code written for a subject instruction set architecture (ISA) to transparently run a target ISA at native speeds or better. The current implementation of Dynamite A/M runs on a Linux operating system. The company plans to develop future versions of Dynamite A/M next year, supporting WinCE as well as other relevant operating systems. Transitive is demonstrating its ARM to MIPS platform, called Dynamite A/M, on Alchemy's reference design at the Microprocessor Forum in San Jose this week, October 15-17.
Related Semiconductor IP
- Xtal Oscillator on TSMC CLN7FF
- Wide Range Programmable Integer PLL on UMC L65LL
- Wide Range Programmable Integer PLL on UMC L130EHS
- Wide Range Programmable Integer PLL on TSMC CLN90G-GT-LP
- Wide Range Programmable Integer PLL on TSMC CLN80GC
Related News
- Transitive Technologies and Alchemy Semiconductor Collaborate to Enable ARM Binary Code to Run on Alchemy's MIPS-based Processors
- Wave Computing's MIPS Processors Power 80% of Today's ADAS-Enabled Automobiles
- MIPS Selects Imperas for Advanced Verification of High-Performance RISC-V Application-class Processors
- ScaleFlux To Integrate Arm Cortex-R82 Processors in Its Next-Generation Enterprise SSD Controllers
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing