digital ADC IP

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Compare 364 IP from 65 vendors (1 - 10)
  • 15b 4kS/s cyclic/algorithmic serial ADC (Analog/ Digital Converter)
    • Effective Number of Bits: 15b (SNDR=92dB signal-to-noise-and-distortion-ratio) with digital IIR filter post-processing
    • Power supply 3.3V, Power Consumption 200µW
    • 0.35um CMOS Technology
    • Low input sampling capacitor of 4pF
    Block Diagram -- 15b 4kS/s cyclic/algorithmic serial ADC (Analog/ Digital Converter)
  • 12b 1MS/s cyclic/algorithmic serial ADC (Analog/ Digital Converter)
    • Effective Number of Bits: 11b (SNDR=68dB signal-to-noise-and-distortion-ratio)
    • Power supply 3.3V
    • 0.35um CMOS Technology
    • Low input sampling capacitor of 7pF
    Block Diagram -- 12b 1MS/s cyclic/algorithmic serial ADC (Analog/ Digital Converter)
  • Dual core I & Q Analog to Digital Converter
    • Maturity MAT05
    • 9-bits DUAL-CORE I & Q SAR ADC
    • Up to 1.62Gsps Sampling Rate
    • Analog power supply for Input Buffer: from 1.7V to 2.75V (GO2 domain)
    Block Diagram -- Dual core I & Q Analog to Digital Converter
  • 16-bit, 160MSPS ADC - GF 22 nm
    • 16-bit resolution
    • 100 MSPS sampling rate
    • 48 mW power
  • 13-bit, 80 MSPS ADC - TSMC 65nm
    • The A13B80M is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
    • It is a hybrid-SAR ADC, with 13-bit resolution and a sampling speed of 80 megasamples per second (MSPS).
  • 12-bit, 9.2 GSPS Pipeline ADC - GlobalFoundries 22nm
    • The A12B9G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
    • It is a time-interleaved successive approximation register (SAR) ADC, with 12-bit resolution, and a sampling speed of 9 giga samples per second (GSPS).
  • 12-bit, 200 MSPS Pipeline ADC - TSMC 28nm
    • The A12B200M is a low-power, analog to digital converter (ADC) intellectually property (IP) design block.
    • It is a hybrid successive approximation register (SAR) ADC, with 12-bit resolution, and a sampling speed of 200 megasamples per second (MSPS).
  • 12-bit ADC on Samsung 8nm LN08LPP
    • The sf_adc0802x_ln08lpp_306011 is a 1.8V/0.75V dual supply-voltage 16-ch 12-bit analog-to-digital converter (ADC) that supports conversion rate (FS) up to 1MS/s, designed in 8nm CMOS FinFET process.
    • It consists of a 16-to-1 analog input MUX, a successive approximation (SAR) type monolithic ADC, a clock generator, and level-shifters for low voltage digital interface.
    Block Diagram -- 12-bit ADC on Samsung 8nm LN08LPP
  • 12-bit ADC on Samsung 4nm LN04LPE
    • ADC0401X is a 1.2-V/0.75-V dual supply voltage 16-channel 12-bit Analog-to-Digital Converter (ADC) that supports conversion rate (FS) up to 1 MS/s, designed in 4-nm CMOS FinFET process.
    Block Diagram -- 12-bit ADC on Samsung 4nm LN04LPE
  • 12-bit ADC on Samsung 28nm LN28FDS
    • The ADC2859X is a 1.8V/1.1V dual supply-voltage 16-ch 12-bit analog-to-digital converter (ADC) with 3-ch S/H(sample and hold) that supports conversion rate (FS) up to 1.25MS/s, designed in 28nm FDS CMOS process.
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