altera IP
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253
IP
from 61 vendors
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Aurora-like 64b/66b @14Gbps for ALTERA Devices
- Full-Duplex operation.
- Simplex operation.
- Up to 14.1Gbps bit rate per lane
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Aurora-like 8b/10b @3Gbps for ALTERA Devices
- Up to 3.125Gbps bit rate per lane
- Configurable up to 16 transceivers lanes
- 8B/10B encoding
- Native flow control with immediate and completion mode
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NAND flash Controller using Altera PHY Lite
- ONFI 4.x Compliant
- SLC / MLC / TLC
- SDR modes 0 to 5
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Video Tracking FPGA IP core for Xilinx and Altera
- MAIN PARAMETERS
- High processing speed. One video frame processing time: for rectangle 128x128 pixels – 25 ms; for rectangle 128x64 pixels – 13 ms; for rectangle 64x64 pixels – 6,5 ms.
- Objects tracking from 8x8 pixels to 128x128 pixels and more. Object part tracking.
- Tracking of objects of very low contrast (from 10%) on a complex background in terms of interference.
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Video Tracking FPGA IP core for Xilinx and Altera
- Tracking up to 80 fps at core clock frequency 300 MHz and object size of 128x128 pixels.
- The IP core implements 1 tracking channel. If sever-al channels are required, several cores need to be used.
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Video Tracking FPGA IP core for Xilinx and Altera
- Tracking up to 80 fps at core clock frequency 300 MHz and object size of 128x128 pixels
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TSN Ethernet Endpoint Controller
- Subsystem suitable for the implementation of bridges or nodes for automotive or industrial Ethernet
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TSN Ethernet Switched Endpoint Controller
- TSN Ethernet Switched Endpoint
- Low Latency & Flexible Switching
- Easy System Integration
