SHA-3 IP
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SHA3 IP Core
- SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIPS 202'. This standard specifies methods for generating secure hash values using the SHA-3 algorithm.
- SHA3 IP Cores support the SHA3-224, SHA3-256, SHA3-384, SHA3-512, SHAKE128, and SHAKE256 functions, and are byte-oriented in their implementation.
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SHA3 core for accelerating NIST FIPS 202 Secure Hash Algorithm
- Supports variable length SHA-3 Hash Functions
- Supports Extendable Output Functions (XOF)
- Configurable architecture for achieving the required performance and silicon area
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SHA-3 Crypto Core
- SHA3 IP is a high-throughput implementation of SHA-3 cryptographic hashing function built-in an area-efficient approach.
- The core can provide all the fixed-length hashing functions provided as part of the SHA-3 standard.
- A common core is available for diverse ASIC & FPGA applications.
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SHA-3 Crypto IP Core
- FIPS 202 compliant
- Supports cryptographic hashing for SHA-3 in 224/256/384/512 mode
- Extendable-Output Functions for SHAKE 128/256
- AMBA® AXI4-Stream
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Secure Hash Algorithm-3 (SHA-3)
- Support NIST FIPS 202 standard
- Pass NIST FIPS 202 test vectors
- Support four cryptographic hash functions
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Tunable Cryptography solutions with embedded side-channel protections: AES - SHA2 - SHA3 - PKC - RSA - ECC - Crystals Kyber - Crystals Dilithium - XMSS - LMS - SM2 - SM3 - SM4 - Whirlpool - CHACHA20 - Poly1305
- Tunability for consumer requirements
- Security (different levels, SCA, FIA)
- Modes
- Area
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Tunable Hash (SHA3) Hardware accelerator
- AMBA interface
- Supported function: SHA-224, SHA-256, SHA-384, SHA-512, SHAKE-128, SHAKE-256
- Compliant with FIPS-202
- Tunable performance (area and performance) - From low area to high-performance
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SHA-3 Secure Hash Function
- Standards support
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SHA-3 Crypto Engine
- FIPS 202 and FOS 180-4 compliant
- SHA3-224, SHA3-256, SHA3-384, SHA3-512
- SHAKE-128, SHAKE-256
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SHA-3 Secure Hash Crypto Engine
- The SHA-3 is a high-throughput, area-efficient hardware accelerator for the SHA-3 cryptographic hashing functions, compliant to NIST’s FIPS 180-4 and FIPS 202 standards.
- The accelerator core requires no assistance from a host processor and uses standard AMBA® AXI4-Stream interfaces for input and output data.
