S3 IP

• Optimized Performance per Watt Efficiency
• Performance and Power Efficiency for AI and ML Workloads
• Arm’s Most Scalable Platform

Arm Neoverse V3AE is the perfect platform for developing complex automated driving and ADAS vehicle systems.

• Single-chip solution: The PHY IP can be combined with Link Layer IPs, creating smaller solutions. Additional components can be added to create a System On Chip (SOC) solution.
• Flexible number of ports: Commercially available PHY chips have a fixed number of ports which for small peripherals is often overkill. On the other hand, host adapter would likely benefit from 3 or more ports and a hub could even have more than that. For a PHY based on FPGA technology, the user can customize the number of ports as required.
• Optional debug and test features: Optionally the user can include debug and test features like BERT (Bit Error Rate Test) Low level data monitoring and recording
• Field-upgradable: The used FPGAs are field upgradable thus allowing the addition new features or bug fixes, even if the device is already in the field.

• Complete IP solution supporting IEEE-1394b-2008 and AS5643
• Support for speeds from S100 to S3200
• Single-Speed Support (S100, S200, S400, ...)
• Multi-Speed Support (S100 - S400, S800 - S3200)

• IEEE 1394-1995, 1394a-2000 and 1394b-2002 compliant
• Supports 100, 200, 400, and 800Mbps data transfer rates
• Supports Legacy and Beta packets RX/TX (depending on the connected PHY)
• Supports all standard 1394 packet types

• Complete IP solution combining FireLink® Basic and FireGate
• IEEE-1394-2008 Beta
• Supports S100-S3200 transfer rates
• Minimal Footprint