Post-Quantum IP
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Post-Quantum Key Encapsulation IP Core
- The PQC-KEM is an IP Core for ML-KEM Key Encapsulation that supports key generation, encapsulation, and decapsulation operations for all ML-KEM variants standardized by NIST in FIPS 203.
- ML-KEM is a post-quantum cryptographic (PQC) algorithm, designed to be robust against a quantum computer attack.
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Secure-IC's Securyzr Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
- Scalable architecture and crypto engines for optimal performance/resource usage
- Configurable for perfect application fit
- 100% CPU offload with low latency and high throughput
- DPA countermeasures Full software/driver support
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Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
- Turn-key implementations of the NIST FIPS recommended CRYSTALS post-quantum for key encapsulation (KEM) and digital signature algorithm (DSA)
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CRYSTALS-Dilithium - Post-Quantum Digital Signature IP Core
- Dynamic selection of security level
- Works with SHA3 and SHA2 hash functions
- Can utilize external source of randomness
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Post-Quantum Cryptography IP: Crystals Kyber - Crystals Dilithium - XMSS - LMS
- 512 and/or 768 and/or 1024-bit secret key length
- Implementation protected against Side-Channel Attacks (Key Generation and Key Decapsulation operations are sensitive):
- Hybrid hardware-software tunable solution
- Tunable in performance or power/area
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Post-Quantum Cryptographic Processor
- FPGA proven
- Offer tuneable performance and size
- AXI4 ready
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Post-Quantum Cryptography Processor
- PQPlatform-CoPro (PQP-HW-COP) adds PQShield’s state-of-the-art post-quantum cryptography (PQC) to your security sub-system, with optional side-channel countermeasures (SCA).
- PQPlatform-CoPro can be optimized for minimum area as part of an existing security sub-system.
- PQPlatform-CoPro is designed to be run by an existing CPU in your security system, using PQShield’s supplied firmware.
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Lattice-based Post-Quantum Cryptography Processing Engine
- PQC(post-quantumcryptography) engine
- NISTSP800-56Acomplaint
- NISTFIPS186-4and186-5compliant
- ANSSIX9.142-2020compliant
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Hash-based post-quantum hardware accelerator
- Power side-channel secure (SCA) Keccak engine
- AXI4-Lite (64-bit 1x subordinate)
- NIST FIPS-202 SHA3-224/256/384/512
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IoT device security platform with a hybrid post-quantum cryptographic algorithm
- Software development lifecycle integration (SDLC, CI/CD)
- Key and certificate management (PKI/CLM)
- On-device security features (e.g. secure boot, flash encryption)
- On-device key generation & storage