Phy IP

Compare 4,221 IP from 198 vendors (1 - 10)

Bluetooth 5.3 Dual Mode PHY IP
- The icyTRX-DM ultra-low-power RF transceiver IP is designed to meet 2.4 GHz standards like Bluetooth Classic (BR/EDR), Bluetooth Low Energy (BLE), 802.15.4 PHY Layer (e.g. ZigBee), and proprietary standards.
- icyTRX-DM IP targets by far the lowest power consumption together with state-of-the-art performances (sensitivity, interferers rejection) and with minimal cost.
- Thanks to its built-in LDOs, its fully programmable modem and its interface compatible with leading BT baseband controllers, the icyTRX-DM IP is optimized for easy integration into ASICs and SoCs
Simulation VIP for PIPE PHY
- Device Type
- PipeXceiver
- SerialXceiver
- PHYDUT Monitor
PCIe GEN6 PHY IP
- The PCIe GEN6 PHY IP achieves data rates up to 64GT/s per lane with PAM4 signaling thereby delivering reliable performance for high-speed data transfer.
- It supports advanced applications, including AI/ML, High-Performance Computing, and next-generation storage solutions.
LPDDR4/4x/5/5x PHY
- Supports JEDEC SDRAM standards including LPDDR4 (1.1V), LPDDR4x (0.6V), LPDDR5/5x (0.5V)
- Supports data rates up to 4,266 Mbps LPDDR4/LPDDR5 and up to 8,533 Mbps LPDDR5x
- Support for 16, 32 and 64-bit operation
TSMC 3nm HBM3-8.6G PHY
TSMC 5nm HBM3-8.4G PHY
TSMC CLN7FF HBM3 PHY
- IGAHBMX03A is a HBM3 (High Bandwidth Memory) PHY IP compliant to the JEDEC HBM3 DRAM Specification Rev 0.95.
- Built on TSMC 7nm process node, it supports data rate up to 7200 Mbps per data pin with DFI 1:4 clock frequency ratio (controller clock : WCK = 1:4).
JESD204B/204C IP with PHY and MAC layer
- X4/X8 Lane Mode, support up to 25Gbps (per lane)
- Shared common PLL based architecture
- Digitally-control-impedance termination resistors and On-chip resistance calibration
- Configurable TX output differential voltage swing
Rapid IO 4.0/3.1/2.2 PHY
- 4 Channel per Quad
- Shared Quad common PLL architecture
- Digitally-control-impedance termination resistors
- Configurable TX output differential voltage swing
MIPI C/D PHY
- Compatible with MIPI D-PHY v1.2/CSI-2 protocol
- Up to 4-lane 2.5Gbps/ lane
- Support 2-Lane/4-Lane Application
- Support HS mode (80Mbps to 2.5Gbps per lane) and LP mode (up to 10Mbps)

PHY IP