PCle IP
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PCle 4.0 PHY IP - 14nm, 8nm, 5nm, 4nm
- The PCIe 4.0 PHY IP consists of hardmacro PMA and softmacro PCS compliant with PCIe Base 4.0 specification.
- This IP offers a cost-effective and low-power solution using FinFET CMOS technology.
- It includes all ESD I/Os and bump pads and supports extensive built-in self test features such as loopback and scan.
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NVMe Verification IP
- The NVMe Verification IP (VIP) and Post-Silicon Validation Suite are based on the latest protocol standards (NVMe 1.2) from www.nvme.org. These are available from elnfochips for licensing with support and related services.
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Universal Multi-port Memory Controller for RLDRAM2/3, DDR4/3, DDR4 3DS and LPDDR3/2 and LPDDR3/2
- The UMMC Controller is a highly flexible and configurable design. It is targeted for high bandwidth access and low power consumption such as next generation mobile, DDR/LPDDR networking and consumer applications.
- The controller architecture is carefully tailored to achieve reliable high-frequency operation with dynamic power management and rapid system debug capabilities.
