MCMR FEC IP
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27
IP
from 9 vendors
(1
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10)
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MCR DDR5 PHY
- Fully pre-assembled design, Drop-in hard macro to ease integration and speed time to market
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UCIe-S PHY and Controller
- Supports MCM, BGA packages and Chiplet2Chiplet interconnects on PCB
- Available process nodes: 28, 22, 16, 12, 7, 6nm
- X16 and X32 PHY with bump maps defined in UCIe 2.0 specifications
- Industry leading power consumption
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Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N7 X16, North/South (vertical) poly orientation
- 16-lane TX and RX square macros for placement in any edge of the die
- Supports 2.5G to 112G data rates, enabling very high bandwidth per mm of beachfront for die-to-die and die-to-optical engine connectivity
- Implements NRZ and PAM-4 signaling
- Meets the performance, efficiency, and reliability requirements of die-to-die interconnects
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Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N6 X16, North/South (vertical) poly orientation
- 16-lane TX and RX square macros for placement in any edge of the die
- Supports 2.5G to 112G data rates, enabling very high bandwidth per mm of beachfront for die-to-die and die-to-optical engine connectivity
- Implements NRZ and PAM-4 signaling
- Meets the performance, efficiency, and reliability requirements of die-to-die interconnects
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Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N5 X16, North/South (vertical) poly orientation
- 16-lane TX and RX square macros for placement in any edge of the die
- Supports 2.5G to 112G data rates, enabling very high bandwidth per mm of beachfront for die-to-die and die-to-optical engine connectivity
- Implements NRZ and PAM-4 signaling
- Meets the performance, efficiency, and reliability requirements of die-to-die interconnects
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Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC 12FFC X8, North/South (vertical) poly orientation
- 16-lane TX and RX square macros for placement in any edge of the die
- Supports 2.5G to 112G data rates, enabling very high bandwidth per mm of beachfront for die-to-die and die-to-optical engine connectivity
- Implements NRZ and PAM-4 signaling
- Meets the performance, efficiency, and reliability requirements of die-to-die interconnects
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Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC 12FFC X16, North/South (vertical) poly orientation
- 16-lane TX and RX square macros for placement in any edge of the die
- Supports 2.5G to 112G data rates, enabling very high bandwidth per mm of beachfront for die-to-die and die-to-optical engine connectivity
- Implements NRZ and PAM-4 signaling
- Meets the performance, efficiency, and reliability requirements of die-to-die interconnects
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Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to GF 12LP+ x8, North/South (vertical) poly orientation
- 16-lane TX and RX square macros for placement in any edge of the die
- Supports 2.5G to 112G data rates, enabling very high bandwidth per mm of beachfront for die-to-die and die-to-optical engine connectivity
- Implements NRZ and PAM-4 signaling
- Meets the performance, efficiency, and reliability requirements of die-to-die interconnects
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Die-to-Die, 112G Ultra-Extra Short Reach PHY in GF (12nm)
- Offers leading performance, power, and area / beachfront per terabit
- Includes 16 lanes of NRZ and PAM-4 transmitters or receivers
- Targeting the OIF XSR standards: CEI-112G and CEI-56G
- Implements robust clock forwarded and embedded clock recovery algorithms for additional flexibility
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Die-to-Die, 112G Ultra-Extra Short Reach PHY in TSMC (12nm, N7, N6, N5)
- Offers leading performance, power, and area / beachfront per terabit
- Includes 16 lanes of NRZ and PAM-4 transmitters or receivers
- Targeting the OIF XSR standards: CEI-112G and CEI-56G
- Implements robust clock forwarded and embedded clock recovery algorithms for additional flexibility