Building upon the 68K foundation, ColdFire offers RISC performance with industry-leading code density and a rich set of connectivity peripherals. By supporting variable-length instructions (16-, 32- or 48-bits long), the ColdFire Architecture enables higher code density than traditional 32- and 64-bit RISC machines. More efficient use of on-chip memory reduces bus bandwidth and external memory requirements, resulting in lower system cost.
The ColdFire Architecture is ubiquitous in consumer and industrial applications, which means a massive base of existing application code. ColdFire controllers continue to set the pace for the embedded market—from industrial automation systems to inkjet printers and media players.
The V2 ColdFire SPP takes you a step further toward building a complete SoC by integrating popular peripherals from Freescale’s Standard Product Platform with the V2 ColdFire Core, providing a full ColdFire-based subsystem. The peripheral set in the V2 ColdFire SPP is identical to that proven in Freescale’s MCF5208 devices.
The ColdFire V2 Core & Standard Product Platform (CFV2SPPC1) combines the ColdFire V2 Core with industry-proven platform peripherals to form a complete low-cost, low-power microcontroller subsystem supported by a vast ecosystem of development tools and runtime software. The CFV2SPPC1 is the same ColdFire V2 processor core and platform/peripheral IP implemented in NXP MCF5208 devices. With the CFV2SPPC1, you get:
- A fully synthesizable implementation of the popular ColdFire architecture
- Reliability—from processor and peripheral IP already deployed in millions of embedded systems worldwide
ColdFire V2 Core
The ColdFire V2 Core is a low-power, low-area, 32-bit processor core with single-cycle-access local SRAM and a direct-mapped cache that can be configured as instruction cache, data cache, or split instruction/data cache. The ColdFire V2 Core delivers over 250 DMIPS of performance at 240 MHz and includes an enhanced MAC unit for DSP-like functions and faster execution of multiply instructions.
Like all ColdFire architecture processors, the ColdFire V2 Core features a variable-length instruction set for maximum code density, industry-standard AMBA 2 AHB system bus interface for rapid system integration, and a wide selection of development tools, operating systems, drivers, and libraries from both commercial and open source providers.
Standard Peripherals and Interconnect
The CFV2SPP5208 includes the ColdFire V2 Core, plus the fully integrated peripherals shown in Figure 1, providing commonly needed functions such as Ethernet, interrupt control, DMA, timers, and various serial interfaces. An AMBA 2 AHB Crossbar Switch provides the system interconnect, supporting simultaneous transfers between multiple AHB masters and slaves, including externally-connected AHB masters and slaves.
Variations of the CFV2SPP5208 with different combinations of on board peripherals are also available. For example, you can add more peripherals, such as another Fast Ethernet Controller, or omit peripherals that you don’t need to reduce system gate count.
Platform Features and Performance
On-board peripherals and their features include:
- FlexBus Controller
- Connects up to 6 on-chip or off-chip memories/devices
- Independently programmable transfer characteristics for each device (wait states, address setup/hold)
- Enhanced DMA (eDMA) Controller
- 16 independently programmable DMA channels
- Programmable channel arbitration modes
- Support for channel linking and scatter/gather operation
- Interrupt Controller
- 64 programmable interrupt sources, 20 of which are available for external interrupts
- Unique vector for each interrupt source
- Support for low-power mode wake-up
- UART
- Programmable clock source, data formats, and modes (normal/loopback)
- Error detection
- Four maskable interrupt conditions
- DMA Timer module
- Programmable clock source
- Programmable prescaler
- Programmable interrupt or DMA request upon timer event
- Miscellaneous Control Module (MCM)
- Software watchdog timer
- Reset status, low-power mode control, and core fault status registers
Power Saving Features
The CFV2SPP1 features software-controlled shutdown of selected clocks to support a variety of chip-level low-power modes:
- Independent shutdown of selected peripheral clocks
- Shutdown of the ColdFire V2 Core CPU clock in response to a ColdFire STOP instruction
Debug Support
The CFV2SPPC1 supports ColdFire Debug Architecture Revision B+, including:
- Background Debug Mode (BDM)
- Real-Time Trace (RTT)
- Real-Time Debug (RTD)
Development Support
The ColdFire architecture, including the ColdFire V2 Core, is supported by a vast assortment of development systems/tools and run-time software including libraries, stacks, drivers, and operating systems from providers such as NXP, Green Hills Software, Wind River Systems, and many more. A free version of the GNU compiler supporting ColdFire V2 targets is also available from www.gnu.org.
NXP offers development boards, software, and CodeWarrior Development Tools (including a free version. In addition, there are several operating systems supporting the ColdFire V2 architecture, including uClinux and several RTOS’s, such as the MQX RTOS from Embedded Access, Inc.
