IP Catalog > DDR3 Controller

DDR3 Controller IP

Filter
Filter

Login required.

Sign in

Login required.

Sign in

Search (132)
Compare 132 IP from 21 vendors (1 - 10)
  • DDR 4/3 Memory Controller IP - 2400MHz
    • Support s DDR 4 /DDR3 SDRAM
    • 16 bit s width , Single Channel DDR 4 /DDR3 SDRAM Interface .
    • 16 bits for per channel, could support 2 x8 bits DDR3, but could not support 2 x8 bits DDR4.
    • Memory Clock up to 6 66 MHz, DFI Clock up to 666 MHz .
    Block Diagram -- DDR 4/3 Memory Controller IP - 2400MHz
  • DDR3 Controller IP
    • o High memory throughput achieved via Parallel operation of all the banks and reordering of commands in the controller to ensure the maximum utilization of the DDR Memory
    • o Pipelined operation across the complete design to ensure the highest performance
    • o DDR Interface
    • o Supports all standard DDR3 (x4,x8,x16) SDRAMs
  • DDR3 SDRAM Controller IP with advance feautures package
    • Supports DDR3 protocol standard JESD79-3F Specification.
    • Compliant with DFI-version 2.0 or higher Specification.
    • Supports all the DDR3 commands as per the specs. Supports up to 16 AXI ports with data width upto 512 bits.
    • Supports controllable outstanding transactions for AXI write and read channels
  • DDR3 Controller IP
    • Supports DDR3 protocol standard JESD79-3F Specification.
    • Compliant with DFI-version 2.0 or higher Specification.
    • Supports all the DDR3 commands as per the specs.
    • Supports up to 16 AXI ports with data width upto 512 bits.
  • DDR3 Controller
    • Component support for interface width of 8 to 80 bits (RDIMM, UDIMM, and SODIMM support)
    • Controler / Phy mode or Phy only mode, plus Ping Pong Phy option
    • DDR3 (1.5V)
    • DDR3L (1.35V)
  • DDR3 Memory Controller
    • Maximizes bus efficiency via Look-Ahead command processing, Bank Management, Auto-Precharge and Additive Latency support
    • Minimal latency achieved via parameterized pipelining
    • Achieves high clock rates with minimal routing constraints
    • Supports full rate and half-rate clock operation
  • Wide-Range Low-Area Digital PLL in TSMC 28HPM
    • TSMC 28HPM
    • Wide Range: 40kHz to 4 GHz
    • Size: <0.0mm2
    Block Diagram -- Wide-Range Low-Area Digital PLL in TSMC 28HPM
  • DDR3 SDRAM Controller
    • Support for all LatticeECP3 &ldquo;EA&rdquo; devices
    • Interfaces to Industry Standard DDR3 SDRAM components and modules compliant with JESD79-3, DDR3 SDRAM Standard
    • Interfaces to DDR3 SDRAM at speeds up to 400 MHz / 800 Mbps in -8 speed grade devices
    • Supports memory data path widths of -8, -16, -24, -32, -40, -48, -56, -64 and -72 bits
    Block Diagram -- DDR3 SDRAM Controller
  • High Performance DDR 3/2 Memory Controller IP
    • Supports DDR3/DDR2 SDRAM
    • 16 bits width DDR2/DDR3 SDRAM Interface
    • Memory Clock up to 462MHz, DFI Clock up to 462MHz
    • Support DDR2 667/800/1066 and DDR3 667/800/1066/1333/1600/1866
×
Semiconductor IP