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Compare 3,500 IP from 204 vendors (1 - 10)
  • IrDA controller
    • SIR, MIR, FIR – The IRDA controller supports data rates from 2.4 Kbps to 115.2Kbps in SIR mode, 1.152 Mbps in MIR (Medium IR), and 4Mbps in FIR mode
  • I2C Master Controller
    • The I2C (Inter-Integrated Circuit) master controller operates using two wires – SCL and SDA.
    • The controller supports programmable speeds up to 400 kHz.
    • It has a generic application interface for integration
  • SPI Master Controller
    • The SPI (Serial Peripheral Interface) host controller supports a maximum of 4 devices and has a programmable SPI clock.
    • This supports full-duplex synchronous data transfers.
    • The controller supports a variable length of transfer word up to 32 bits and supports programmable SPI Clock Polarity and Phases
  • IEEE1284 Parallel Port Controller
    • The IEEE1284-compliant parallel port controller supports faster data rates up to 2.0Mbytes/sec.
    • Supports Nibble mode, Byte Mode, EPP, and ECP. Auto-negotiation is implemented in hardware
  • Generic GPIO controller
    • General Purpose I/O pins are used for system control and connection of various devices.
    • This (GPIO) controller provides dedicated general-purpose pins that can be configured as either inputs or outputs.
  • SATA II v2.6 Host Controller
    • The SATA II Host Controller implements an AHCI/Emulation interface that interfaces with SATA PHY using the SAPIS interface on one side and to an application on the other side using the VCI interface.
    • The emulation interface is used to be backward compatible with existing software and supports both PIO and DMA modes of operation.
    Block Diagram -- SATA II v2.6 Host Controller
  • SATA II v2.6 Device Controller
    • The SATA II Device Controller interfaces with SATA PHY using the SAPIS interface on one side and to an application on the other side using the VCI interface.
    • It supports PIO, DMA, QDMA, and FPDMA modes of operation and supports NCQ using the FPDMA mode of operation. It also supports SATA power management features
    Block Diagram -- SATA II v2.6 Device Controller
  • DMA Controller
    • The memory 2 memory DMA controller transfers data from one memory location to another memory location.
    • DMA operation begins when software enables a DMA, after setting the source and destination starting addresses, transfer count, and control information.
    • The DMA engine moves the data block, and the DMA operation ends naturally when the number of bytes specified by the transfer count has been moved
  • PCI v2.1 Host Controller
    • The PCI Host controller offers a PCI 32-bit bus operating at 33MHz and supports PCI devices conforming to the PCI Local Bus Specification 2.1.
    • PCI Host Bridge contains an internal arbiter to manage up to 4 external devices 
    Block Diagram -- PCI v2.1 Host Controller
  • PCI v2.1 Master/Slave controller
    • The PCI master/slave controller is fully compliant with PCI Local Bus Specification, Revision 2.3.
    • It has a fully customizable PCI Configuration Space. The controller supports both 32- and 64-bit PCI bus paths.
    • The application interface can be configured as a 32-bit bit as well as a 64-bit interface as per requirements.
    Block Diagram -- PCI v2.1 Master/Slave controller
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