2D graphics IP

Filter

Foundries

TSMC (2)

Nodes

40nm (2)

IP Type

Silicon IP (28)

Compare 28 IP from 12 vendors (1 - 10)

2D Graphics Hardware Accelerator (AHB Bus)
- Generates bitmaps from graphics instructions as well as combining existing bitmaps on and off-screen using one of 256 Raster Operations. A Raster Operation (ROP) is a bitwise Boolean operation (such as AND, OR, XOR, NOT) which lay the foundation for power hardware graphics primitive operations
- Generates characters from compressed bitmaps using its FONT Bitmap Color Expansion Unit
- Performs Alpha Blend operations of bitmaps with its Alpha Blend unit
- Draws lines, polygons, circles using its hardware efficient & pixel accurate Bresenham Algorithm Line Drawing Unit
2D Graphics Hardware Accelerator (AXI Bus)
- Generates bitmaps from graphics instructions as well as combining existing bitmaps on and off-screen using one of 256 Raster Operations. A Raster Operation (ROP) is a bitwise Boolean operation (such as AND, OR, XOR, NOT) which lay the foundation for power hardware graphics primitive operations
- Generates characters from compressed bitmaps using its FONT Bitmap Color Expansion Unit
- Performs Alpha Blend operations of bitmaps with its Alpha Blend unit
- Draws lines, polygons, circles using its hardware efficient & pixel accurate Bresenham Algorithm Line Drawing Unit
2D Blit and Raster Graphics
- All buffer formats 100% compatible
- Flexible pixel formats (1/2/4/8/16/18/24/32 bpp; any bit width per channel)
- YUV support (packed, planar, 4:4:4, 4:2:2, 4:2:0, progressive, interlaced)
- Dynamic re-configuration of processing units
Advanced 2D Graphics Controller
- Fully synchronous, synthesizable and technology independent RTL code
- Capable of drawing shapes such as pixels, lines and rectangles
2D Graphics Processor for Wearables/IoT
- Fully programmable engine with a VLIW instruction set
- Fixed point functional units
2D Graphics Hardware Accelerator (AXI4 Bus)
- Generates bitmaps from graphics instructions as well as combining existing bitmaps on and off-screen using one of 256 Raster Operations. A Raster Operation (ROP) is a bitwise Boolean operation (such as AND, OR, XOR, NOT) which lay the foundation for power hardware graphics primitive operations
- Generates characters from compressed bitmaps using its FONT Bitmap Color Expansion Unit
- Performs Alpha Blend operations of bitmaps with its Alpha Blend unit
- Draws lines, polygons, circles using its hardware efficient & pixel accurate Bresenham Algorithm Line Drawing Unit
High-performance and low-power 2D vector graphics IP core
- K3000 is an OpenVG 1.1 compliant 2D vector graphics IP core that achieves the industry’s highest-level PPA (Power / Performance / Area), realizing smooth 2D vector drawing in combination with Qt and various font engines compliant with OpenVG 1.1.
2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load
- Pixel performance
- 3D rendering
- Texture size
- 2D rendering
2D (vector graphics) GPU IP Further advanced architecture for minimized CPU load and increased pixel performance in vector processing
- Pixel performance
- Texture size
- 2D rendering
High-performance 2D (sprite graphics) GPU IP combining high pixel processing capacity and minimum gate count.
- GH310 is a GPU IP that packages the 2D Sprite engine available in the GSHARK-TAKUMI family IPs. This IP accelerates 2D graphics on embedded systems such as digital audio-video devices.
- Casting no LSI cost impact with the smallest-in-family footprint (gate count), GH310 helps enrich your displays including GUIs instantly and easily.