2D Blit and Raster Graphics

Overview

The SEERIS Graphics Engine is a building block concept combining a collection of 2D graphics processing units with focus on blit operations, display control and video capture.

Key Features

  • All buffer formats 100% compatible
  • Flexible pixel formats (1/2/4/8/16/18/24/32 bpp; any bit width per channel)
  • YUV support (packed, planar, 4:4:4, 4:2:2, 4:2:0, progressive, interlaced)
  • Dynamic re-configuration of processing units
  • Ready to support standards (i.e. OpenWF)
  • Optimized for operations without read-after-write dependencies
  • Scan directions: 90/180/270° rotation, horizontal/vertical flip
  • Multiple layers (alpha blend) with configurable mapping
  • Scaling and warping on-the-fly (e.g. windshield correction)
  • Image compression and decompression on-the-fly
  • Spacial and temporal dithering
  • Special safety features
  • Various dual display modes and programmable timing generators
  • Perspective warping (simple 3D effects = “2.5D”)
  • Arbitrary warping (e.g. for lens distortion removal or HuD)
  • High quality re-sampling (super-sampling, anisotropic)
  • Linear light filtering (improves motion blur and anti-aliasing quality)
  • Image compression and decompression
  • Programmable FIR filter (blurring, sharpening, etc)

Benefits

  • Originally developed for automotive but used in many other applications
  • Generic, flexible, silicon-proven
  • Fast RTL generation using automated design flow
  • Standardized interfaces and processing
  • Used in Application Processors, GPUs, MCUs, Codecs and GDCs.
  • Field proven : Over 10 different variants deployed in various devices in the market

Applications

  • Automotive, Industrial and Consumer

Deliverables

  • Verilog RTL
  • Integration Test-bench
  • Documentation
  • Software example drivers
  • Performance uses cases

Technical Specifications

Foundry, Node
Soft IP (any silicon process)
Maturity
Silicon Proven
Availability
Available
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Semiconductor IP