2D IP
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140
IP
from 41 vendors
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10)
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2D Graphics Hardware Accelerator (AXI4 Bus)
- Bit Block Transfer - 3 Independent Memory Sources of data
- .2D Raster Operations (ROP) performed on Block Transfers
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2D Scaler
- Support for multi-color plane (RGB and YCbCr4:4:4), serial filtering
- Dynamic input and output frame size updating
- Supports multi-scaling algorithms
- Configurable number of filter taps for Lanczos coefficient set
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2D FIR Filter
- Single color plane
- Single-rate, interpolating, and decimating filter configurations
- Input frame size set at compile-time
- Static or dynamic zoom and pan
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2D Edge Detector
- Single color plane input
- Configurable input data width
- Dynamically variable input frame size
- Dynamic active region selection
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2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load
- Pixel performance
- 3D rendering
- Texture size
- 2D rendering
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2D (vector graphics) GPU IP Further advanced architecture for minimized CPU load and increased pixel performance in vector processing
- Pixel performance
- Texture size
- 2D rendering
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High-performance 2D (sprite graphics) GPU IP combining high pixel processing capacity and minimum gate count.
- Pixel performance
- Texture size
- Color format
- 2D rendering
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2D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
- Vertically integrated HW + SW solution
- Monolithique HW building block, open to any system integration. Can be associated with any companion IP:
- 2 hardware versions:
- Software ported on numerous processors and OS
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Advanced 2D Graphics Contoller
- Fully synchronous, synthesizable and technology independent RTL code
- Capable of drawing shapes such as pixels, lines and rectangles
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Bit Block Transfer 2D video accelerator
- Supported 16 different ROP2 operations
- Contiguous and Array image addressing modes
- Color keyed transparency
- Color Expansion for Font acceleration