AMBA AXI IP
Welcome to the ultimate AMBA AXI IP hub! Explore our vast directory of AMBA AXI IP
All offers in
AMBA AXI IP
Filter
Compare
138
AMBA AXI IP
from 26 vendors
(1
-
10)
-
Tessent Bus Monitor
- Full transaction and trace-level visibility of on-chip bus traffic
- Wide range of measurements, analytics statistics: Transactions, Bus cycles, latency, duration, beats, bus concurrency
- Supports AXI, ACE, ACE-lite
- Run-time configurable
-
PCIe 5.0 Controller with AMBA AXI interface
- Compliant with the PCI Express 5.0 rev. 0.7 (32 GT/s), 4.0 (16 GT/s), 3.1/3.0 (8 GT/s) and PIPE (8-, 16-, 32- and 64-bit) specifications
-
CCIX 1.1 Controller with AMBA AXI interface
- Controller IP for PCIe 5.0, 4.0, 3.1/3.0 Supporting Root Port, Endpoint, Dual-mode, Switch Port Configurations, with CCIX ESM Support and AMBA AXI Interconect User Interface
-
PCIe 4.0 Controller with AMBA AXI interface
- Complies with the PCI Express Base 4.0 Specification,
- Supports Endpoint and rootport configuration
- Supports x16, x8, x4, x2, x1 at Gen4, Gen3, Gen2, Gen1 speeds
-
AHB Octal SPI Controller with Execute in Place
- Compatible with many industry-standard serial FLASH devices
- Execute-in-place (XIP)
- AMBA AXI4 interface
-
CodaCache® Last Level Cache IP
- Standalone IP
- 1.2 GHz frequency in 16FF+TT process
- Protocol interoperability: AMBA AXI 4
-
RapidIO to AXI Bridge (RAB)
- Compliant with RapidIO specification, Revision 4.0
- Compliant to AMBA AXI protocol v4
- Supports 32-bit or 38-bit addressing
- AXI PIO operation with configurable number of AXI Slaves
-
SD 4.0 UHS-II PHY TSMC 28nm HPM North-South
- Compliant with SD Specifications Part 1 UHS-II Addendum v1
- Supports data rate between 390 Mbps to 1.56 Gbps per lane
- Supports peak interface speed of 3.12 Gbps in Half-duplex mode; 1.56 Gbps in Full-duplex mode
- Sub-LVDS differential PHY signaling
-
DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Command Stream List
- 2 Dedicated DMA Channels, 1 each for data transfers for the following:
- Command and Status via AXI4-Stream Interfaces - 1 set per MM2S & S2MM:
- MM2S & S2MM DMA Controllers:
- Individual Interface Data Widths: 8 / 16 / 32 / 64 / 128 / 256 / 512 / 1024.
-
DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List
- 2 Dedicated DMA Channel
- Command and Status via Scatter Gather List (SGL)
- Arbiter – Round Robin