IP Catalog > Interface IP > Interconnect IP > Interlaken IP

Interlaken IP

Welcome to the ultimate Interlaken IP hub! Explore our vast directory of Interlaken IP
All offers in Interlaken IP
Filter
Filter

Login required.

Sign in

Search (14)
Compare 14 Interlaken IP from 7 vendors (1 - 10)
  • Interlaken Controller
    • MAC layer with fast AMBA CXS interface
    • PCS layer highly configurable with up to 48 lanes
    • Multi-lane configurations, up to 48 lanes
    • 64B 67B encoding/decoding supported
    Block Diagram -- Interlaken Controller
  • Interlaken Verification IP
    • Implemented natively in OpenVera, Verilog, SystemC, Specman E and SystemVerilog.
    • Follows Interlaken specification as defined in Interlaken protocol definition v1.2.
    • Supported RVM, AVM, VMM, OVM, UVM and non-standard verify env.
    • Compliant to Interlaken protocol specification v1.2
    Block Diagram -- Interlaken Verification IP
  • Interlaken Synthesizable Transactor
    • Follows Interlaken specification as defined in Interlaken protocol definition v1.2
    • Supports Interlaken look aside protocol specification v1.0
    • Supports Interlaken retransmission extension specification 1.1
    • Supports multi-channel implementation as per the specification
    Block Diagram -- Interlaken Synthesizable Transactor
  • INTERLAKEN IIP
    • Compliant with Interlaken protocol specification v1.2
    • Interlaken look as side protocol 1.1
    • Interlaken retransmission extension specification 1.2
    • Interlaken Reed-Solomon Forward Error Correction Extension 1.1
    Block Diagram -- INTERLAKEN IIP
  • Interlaken Verification IP
    • Compliant to Interlaken Protocol Specification Rev 1.2, Interlaken Look-Aside Protocol Definition Rev 1.1, Interlaken Retransmit Extension Protocol Definition Rev 1.2, Interlaken Interoperability Recommendation v 1.9.
    • Complainto theReed Solomon Forward Error Correction Extension 1.0
    • Configurable BurstMax, BurstMin, BurstShort size, Meta Frame Length, Channel ON/OFF.
    • Configurable Number of lanes. Up to 64K channels using Multi-Use bits.
    Block Diagram -- Interlaken Verification IP
  • Interlaken-PHY
    • Fully compliant with Interlaken Protocol v.12 Framing Layer specification
    • Any number of physical lanes supported
    • Channel bonding handled by core
    Block Diagram -- Interlaken-PHY
  • Interlaken Communication Controller
    • Up to 8 lanes and each lane operating at data rates up to 6.25 Gbs
    • Link resiliency with support for operation with fewer lanes
    • Support for up to 256 channels
    • Implements out-of-band and in-band flow control
    Block Diagram -- Interlaken Communication Controller
  • Interlaken, 40G, 8 Lanes
    • Local serial loop-back from transmitter to receiver at serial transceiver for self test
  • Interlaken, 150G, 24 Lanes
    • Receiver-link fault status detection
  • Interlaken, 100G, 20 Lanes
    • Separate transmitter (TX) and receiver (RX) serial transceiver PLL reference clock inputs to allow optional external Sync-E jitter cleaner PLL to feed the cleaned clock to TX PLL reference clock input
×
Semiconductor IP