IP Catalog > Interface IP Cores > Ethernet IP

Ethernet IP

Ethernet IP cores, including 112G and 224G PHYs, up to 1.6T controllers, MACsec security modules, and Verification IP, offer optimized power, performance, area, and latency for automotive, HPC, AI, and IoT SoCs.

Ethernet is defined in a number of IEEE 802.3 standards. These standards define the physical and data-link layer specifications for Ethernet.

Explore our vast directory of Ethernet IP cores below

All offers in Ethernet IP
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Search (386)
Compare 386 Ethernet IP from 68 vendors (1 - 10)
  • Multi-channel, multi-rate Ethernet aggregator - 10G to 1.6T ZX (e.g., Telecom)
    • OmegaCORE 1p6T ZX from Alphawave Semi is a multi-channel, multi-rate Ethernet aggregator that supports tributaries from 10GE to 800GE, utilizing 112G/s SerDes and 56G/s SerDes. OmegaCORE 1p6T ZX consists of multi-channel and multi-rate PCS and MAC Cores.
    Block Diagram -- Multi-channel, multi-rate Ethernet aggregator - 10G to 1.6T ZX (e.g., Telecom)
  • Multi-channel, multi-rate Ethernet aggregator - 10G to 800G ZX (e.g., Telecom)
    • The OmegaCORE 800G_ZX is a multi-channel, multi-rate Ethernet aggregator that supports tributaries from 10GE to 800GE, utilizing the 112Gbps SerDes and 56Gbps SerDes.
    Block Diagram -- Multi-channel, multi-rate Ethernet aggregator - 10G to 800G ZX (e.g., Telecom)
  • Multi-channel, multi-rate Ethernet aggregator - 10G to 400G ZX (e.g., Telecom)
    • OmegaCORE 400G ZX is a multi-channel, multi-rate Ethernet aggregator that supports tributaries from 10GE, 25GE, 40GE, 50GE, 100GE, 200GE and 400GE in combinations up to a maximum of 400GE.
    Block Diagram -- Multi-channel, multi-rate Ethernet aggregator - 10G to 400G ZX (e.g., Telecom)
  • Multi-channel, multi-rate Ethernet aggregator - 10G to 100G ZX (e.g., Telecom)
    • The 10G-100G_ZX  is a multi- channel, multi-rate Ethernet aggregator that supports tributaries in combinations up to 100G utilizing the 112G/s SerDes, 56G/s SerDes and 25G/s SerDes.
    Block Diagram -- Multi-channel, multi-rate Ethernet aggregator - 10G to 100G ZX (e.g., Telecom)
  • Gigabit Ethernet with IEEE 1588 and AVB
    • The Gigabit Ethernet Media Access Controller IP is compliant with the Ethernet IEEE 802.3-2008 standard and supports protocol extensions for Audio Video Bridging (AVB).
    • The Gigabit Ethernet IP provides a 10/100 Mbps Media Independent Interface (MII) and a 1000 Mbps Gigabit Media Independent Interface (GMII).
    Block Diagram -- Gigabit Ethernet with IEEE 1588 and AVB
  • Gigabit Ethernet MAC IP Core
    • The silicon-proven Gigabit Ethernet IP core provides a 10/100 Mbps Media Independent Interface (MII) and a 1000 Mbps Gigabit Media Independent Interface (GMII).
    • It also supports optional Reduced MII (RGMII), and Serial GMII (SGMII).
    Block Diagram -- Gigabit Ethernet MAC IP Core
  • Fast Ethernet Media Access Controller
    • The Fast Ethernet Media Access Controller (FEMAC) with AHB or AXI Interface core incorporates the essential protocol requirements for operation of 10/100 Mbps Ethernet/IEEE 802.3-2008 compliant node, and provides interface between the AHB or AXI Interface and the Media Independent Interface (MII) for the Ethernet operation.
    • Optionally the core supports RMII (Reduced MII Interface) and SMII (Serial MII Interface) for reducing the pin count to interface with external PHY device.
    Block Diagram -- Fast Ethernet Media Access Controller
  • Ethernet Device Driver
    • The 802.3 Ethernet Device Driver is developed to support both the 10/ 100 Ethernet IP as well as its Gigabit Ethernet IP.
    • The device driver provides communications between the MAC (Medium Access Control) and the OS (Operating System) as well as access to the overlying network layer protocol and the applications layer.
    Block Diagram -- Ethernet Device Driver
  • 10/100 Ethernet MAC IP core
    • The 10/100 Ethernet Media Access Controller (MAC) IP core is compliant with the Ethernet IEEE 802.3-2002 standard and has passed interoperability testing at UNH-IOL.
    • The 10/100 Ethernet IP core provides an 10/100 Mbps Media Independent Interface (MII) and an optional processor interface; it also supports Reduced MII (RMII) and Serial MII (SMII).
    Block Diagram -- 10/100 Ethernet MAC IP core
  • 10 Gigabit Ethernet MAC IP Core
    • The 10 Gigabit Ethernet (XGMAC) IP core is compliant with the Ethernet IEEE 802.3-2008 standard and provides an interface between AHB/AXI Bus and the 10 Gigabit Media Independent Interface (XGMII) using a powerful 64-bit Scatter Gather DMA.
    • The 10 Gigabit Ethernet IP core is designed for applications such as integrated networking devices, host bus adapters, PCI-Express Ethernet controllers, and Ethernet adapter cards.
    Block Diagram -- 10 Gigabit Ethernet MAC IP Core
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